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potuz
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Joined: 30 Jan 2010
Posts: 378

PostPosted: Tue Dec 23, 2014 3:56 am    Post subject: no functioning LED on Samsung 530U3C/530U4C/532U3C Reply with quote

Code:

# uname -a
Linux birra 3.14.14-gentoo #3 SMP Wed Dec 17 18:23:41 BRST 2014 x86_64 Intel(R) Core(TM) i7-3517U CPU @ 1.90GHz GenuineIntel GNU/Linux

Code:

 # dmidecode | grep -A2 "System Information"
System Information
   Manufacturer: SAMSUNG ELECTRONICS CO., LTD.
   Product Name: 530U3C/530U4C/532U3C

none of the four leds in front of the laptop lights up (HDD, battery, power, wifi). The wifi card is
Code:
# lspci -s 01:00.0
01:00.0 Network controller: Intel Corporation Centrino Advanced-N 6235 (rev 24)

ran by iwlwifi. In principle it could be something about /sys/module/iwlwifi/parameters/led_mode but since none of the other leds work (for example when in S3 I would expect the power LED to "breathe" or pulse) I guess this is not a iwlwifi issue.

This laptop is one of the affected ones by the nasty UEFI bug https://bugs.launchpad.net/ubuntu-cdimage/+bug/1040557
However, I am booting in UEFI mode and the samsung-laptop module is thus disabled by the lines of code there:
Code:
 if (efi_enabled(EFI_BOOT))
                return -ENODEV;

I can only see
Code:

# ls /sys/class/leds/
phy0-led

And several efivars in /sys/firmware/efi/vars/

Any help as to where I should start looking for info on these LEDs will be appreciated. Even a hint as to whether I should treat these as separate issues or just one affecting all LEDs, I'm more inclined to think that there's something wrong with (say) my ACPI implementation or something similar, than expecting the coincidence that iwlwifi is not handling correctly the wifi LED and ACPI is not handling correctly the battery one.
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potuz
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Joined: 30 Jan 2010
Posts: 378

PostPosted: Wed Dec 31, 2014 8:40 pm    Post subject: Reply with quote

I decided I'll post here my findings in the hopes that someone with a similar board might know what's going on. The following lines from my dull dmesg show some ACPI conflicts
Code:

[    0.982253] ACPI Warning: SystemIO range 0x0000000000000428-0x000000000000042f conflicts with OpRegion 0x0000000000000400-0x000000000000047f (\PMIO) (20131218/utaddress-258)
[    0.982340] ACPI: If an ACPI driver is available for this device, you should use it instead of the native driver
[    0.982392] ACPI Warning: SystemIO range 0x0000000000000530-0x000000000000053f conflicts with OpRegion 0x0000000000000500-0x0000000000000563 (\GPIO) (20131218/utaddress-258)
[    0.982474] ACPI: If an ACPI driver is available for this device, you should use it instead of the native driver
[    1.982537] ACPI Warning: SystemIO range 0x0000000000000500-0x000000000000052f conflicts with OpRegion 0x0000000000000500-0x0000000000000563 (\GPIO) (20131218/utaddress-258)
[    0.982619] ACPI: If an ACPI driver is available for this device, you should use it instead of the native driver
[    0.982668] lpc_ich: Resource conflict(s) found affecting gpio_ich
....
....
[    1.111862] ACPI Warning: SystemIO range 0x000000000000efa0-0x000000000000efbf conflicts with OpRegion 0x000000000000efa0-0x000000000000efaf (\_SB_.PCI0.SBUS.SMBI) (20131218/utaddress-258)
[    1.114024] ACPI: If an ACPI driver is available for this device, you should use it instead of the native driver

Normally these should be harmless, it means that the BIOS is not willing to share those regions of memory with the OS. The corresponding OpRegions are defined in the BIOS. We can see them in our full DSDT Table. The relevant lines of dissasembled code are
Code:

        OperationRegion (PMIO, SystemIO, PMBS, 0x80) // This is in conflict from Offset 0x28 until 0x2f (so it includes GPE3 and GPS3), PMBS is earlier initialized to 0x400
        Field (PMIO, ByteAcc, NoLock, Preserve)
        {
            Offset (0x04),
                ,   10,
            STYP,   3,
            Offset (0x28),
            Offset (0x2A),
                ,   3,
            GPE3,   1,
            Offset (0x3C),
                ,   1,
            UPRW,   1,
            Offset (0x42),
                ,   1,
            GPEC,   1
        }

        Field (PMIO, ByteAcc, NoLock, WriteAsZeros)
        {
            Offset (0x20),
            Offset (0x22),
                ,   3,
            GPS3,   1,
            Offset (0x64),
                ,   9,
            SCIS,   1,
            Offset (0x66)
        }

        OperationRegion (GPIO, SystemIO, GPBS, 0x64)  // This is in Conflict! The regions in conflict are 0x30--0x3f and 0x00- 0x2f, GPBS is initialized to 0x500
        Field (GPIO, ByteAcc, NoLock, Preserve)
        {
            GU00,   8,
            GU01,   8,
            GU02,   8,
            GU03,   8,
            GIO0,   8,
            GIO1,   8, 
            GIO2,   8,
            GIO3,   8,
            Offset (0x0C),
            GL00,   8,
            GL01,   8,
            GL02,   8,
            GP24,   1,
                ,   2,
            GP27,   1,
            GP28,   1,
            Offset (0x10),
            Offset (0x18),
            GB00,   8,
            GB01,   8,
            GB02,   8,
            GB03,   8,
            Offset (0x2C),
            GIV0,   8,
            GIV1,   8,
            GIV2,   8,
            GIV3,   8,
            GU04,   8,
            GU05,   8,
            GU06,   8,
            GU07,   8,
            GIO4,   8,
            GIO5,   8,
            GIO6,   8,
            GIO7,   8,
            GL04,   8,
            GL05,   8,
            GL06,   8,
            GL07,   8,
            Offset (0x40),
            GU08,   8,
   ...
...
            OperationRegion (SMBI, SystemIO, ShiftLeft (SBAR, 0x05), 0x10) // This region is entirely in conflict
            Field (SMBI, ByteAcc, NoLock, Preserve)
            {
                HSTS,   8,
                Offset (0x02),
                HCON,   8,
                HCOM,   8,
                TXSA,   8,
                DAT0,   8,
                DAT1,   8,
                HBDR,   8,
                PECR,   8,
                RXSA,   8,
                SDAT,   16
            }

The GPIO section seems promising since it may be those pins that control the LEDS. The kernel module that should be loading is gpio_ich since my board is
Code:

 # lspci -v -s1f.0
00:1f.0 ISA bridge: Intel Corporation HM76 Express Chipset LPC Controller (rev 04)
   Subsystem: Samsung Electronics Co Ltd Device c0d7
   Flags: bus master, medium devsel, latency 0
   Capabilities: [e0] Vendor Specific Information: Len=0c <?>
   Kernel driver in use: lpc_ich

If I boot with apci_enforce_resources=no or "lax" then the module does load, but anyway I cannot control (nor see) any GPIO in /sys/class/gpio. In particular I get
Code:

# echo 1 > /sys/class/gpio/export
-bash: echo: write error: No such device

We see that those GPIO are used in the _PTS and _WAK methods in the DSDT. Typically these methods should try to alter the state of the power led, so we hope that one of those calls should be our led:
Code:

    Method (_PTS, 1, NotSerialized)  // _PTS: Prepare To Sleep
    {
        Store (Zero, P80D)
        P8XH (Zero, Arg0)
        Store (\_SB.PCI0.LPCB.H_EC.B1DF, \_SB.BFCC)
        If (LEqual (Arg0, 0x03))
        {
            If (LAnd (DTSE, LGreater (TCNT, One)))
            {
                TRAP (TRTD, 0x1E)
            }

            Store (And (GL07, 0x0A), GBF0)
            And (GL07, 0xF5, GL07)
            Store (And (GL08, 0xA0), GBF1)
            And (GL08, 0x5F, GL08)
            Store (And (GL05, 0x08), GBF2)
            If (LAnd (LEqual (IFFS, One), LEqual (\_SB.FFBF, One)))
            {
                Store (Zero, \_SB.IFFS.FFST)
            }

            While (LNotEqual (\_SB.PCI0.LPCB.PBLV, One))
            {
                Stall (0x64)
            }
        }

        If (LOr (LOr (LEqual (Arg0, 0x03), LEqual (Arg0, 0x04)), LEqual (
            Arg0, 0x05)))                                                                             // Are we going into S3, S4 or S5?
        {
            If (LEqual (PFLV, FDTP))
            {
                Store (One, GP27)                       // is GP27 the status of the power LED GPIO pin?
            }
        }

        If (LEqual (Arg0, 0x04))
        {
            Store (0x06, STYP)
        }
    }


The other devices that are causing the conflicts are
Code:
 # lspci -v -s 1f.3
00:1f.3 SMBus: Intel Corporation 7 Series/C210 Series Chipset Family SMBus Controller (rev 04)
   Subsystem: Samsung Electronics Co Ltd Device c0d7
   Flags: medium devsel, IRQ 18
   Memory at f0614000 (64-bit, non-prefetchable) [size=256]
   I/O ports at efa0 [size=32]

And
Code:
# cat /sys/bus/acpi/devices/PNP0C02\:01/path
\_SB_.PCI0.PDRC
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