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[PATCH] Dual Monitor G5
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ericvh
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Joined: 20 Oct 2003
Posts: 18
Location: Austin, TX

PostPosted: Tue May 18, 2004 1:42 pm    Post subject: [PATCH] Dual Monitor G5 Reply with quote

Anyone have any luck configuring a dual-headed G5? I notice in the fb debug messages that it detects and probes both monitors, but when the system boots there is only one framebuffer device in /dev.
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corsair
Retired Dev
Retired Dev


Joined: 06 Oct 2003
Posts: 451
Location: Aachen, Germany

PostPosted: Tue May 18, 2004 4:37 pm    Post subject: Reply with quote

some more informations would be nice...

what video card do you have?

Markus
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genfoo
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Joined: 17 Apr 2003
Posts: 192

PostPosted: Tue May 18, 2004 9:51 pm    Post subject: Reply with quote

sounds like default behaviour .. there are some old tricks I used to use on dual head setups ... like passing this as a kernel arg:

map=00001111

This mapped the VT's to screen0 and 1 accordingly, I don't remember if that was the exact syntax so you'll have to google it a bit, but I suspect the default behaviour is to use only a single display unless you tell it otherwise.
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ericvh
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Joined: 20 Oct 2003
Posts: 18
Location: Austin, TX

PostPosted: Tue May 25, 2004 3:17 pm    Post subject: Success Reply with quote

Okay - got the patch from benh for X11 4.4 and it works perfectly. Of course, gentoo doesn't have a 4.4 ebuilt, so I'm not sure how well it will work against the x.org stuff. The other nice thing about this is that you no longer have to use the frame buffer driver - so everything is much snappier.

My configuration was (for reference) a G5 with a Radeon 9600 and dual 23" Cinema displays.

Patch follows:

Code:

--- xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_driver.c.orig                 2004-03-09 17:37:37.000000000 -0700
+++ xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_driver.c                 2004-03-09 19:45:00.904997008 -0700
@@ -2661,7 +2661,7 @@
                 int  maxVirtX = pScrn->virtualX;
                 int  maxVirtY = pScrn->virtualY;

-                 if ((DisplayType != MT_CRT) && !info->IsSecondary) {
+                 if (DisplayType != MT_CRT) {
                     /* The panel size we collected from BIOS may not be the
                      * maximum size supported by the panel.  If not, we update
                      * it now.  These will be used if no matching mode can be
@@ -5486,6 +5486,7 @@
    }

    if (!info->IsSecondary) {
+#if 0
                 vgaHWUnlock(hwp);
#if defined(__powerpc__)
                 /* temporary hack to prevent crashing on PowerMacs when trying to
@@ -5499,6 +5500,7 @@
                                                                                                             */
#endif
                 vgaHWLock(hwp);
+#endif
                 save->dp_datatype      = INREG(RADEON_DP_DATATYPE);
                 save->rbbm_soft_reset  = INREG(RADEON_RBBM_SOFT_RESET);
                 save->clock_cntl_index = INREG(RADEON_CLOCK_CNTL_INDEX);
@@ -5557,6 +5559,7 @@
#endif

    if (!info->IsSecondary) {
+#if 0
                 vgaHWUnlock(hwp);
#if defined(__powerpc__)
                 /* Temporary hack to prevent crashing on PowerMacs when trying to
@@ -5567,6 +5570,7 @@
                 vgaHWRestore(pScrn, &hwp->SavedReg, VGA_SR_MODE | VGA_SR_FONTS );
#endif
                 vgaHWLock(hwp);
+#endif
    } else {
        RADEONEntPtr pRADEONEnt = RADEONEntPriv(pScrn);
                 ScrnInfoPtr   pScrn0;
@@ -5574,9 +5578,11 @@

                 pScrn0 = pRADEONEnt->pPrimaryScrn;
                 hwp0   = VGAHWPTR(pScrn0);
+#if 0
                 vgaHWUnlock(hwp0);
                 vgaHWRestore(pScrn0, &hwp0->SavedReg, VGA_SR_MODE | VGA_SR_FONTS );
                 vgaHWLock(hwp0);
+#endif
    }
    RADEONUnblank(pScrn);

@@ -6206,7 +6212,7 @@
                                                                          : 0));

    save->crtc2_offset      = 0;
-    save->crtc2_offset_cntl = INREG(RADEON_CRTC2_OFFSET_CNTL);
+    save->crtc2_offset_cntl = 0;

    save->crtc2_pitch  = (((pScrn->displayWidth * pScrn->bitsPerPixel) +
                                                      ((pScrn->bitsPerPixel * 8) -1)) /
@@ -6220,8 +6226,7 @@
                 save->crtc2_gen_cntl      = (RADEON_CRTC2_EN | (format << 8));
                 save->fp2_h_sync_strt_wid = save->crtc2_h_sync_strt_wid;
                 save->fp2_v_sync_strt_wid = save->crtc2_v_sync_strt_wid;
-                 save->fp2_gen_cntl        = (RADEON_FP2_PANEL_FORMAT |
-                                                                         RADEON_FP2_ON);
+                 save->fp2_gen_cntl = (info->SavedReg.fp2_gen_cntl & 0xffff0000) | RADEON_FP2_PANEL_FORMAT | RADEON_FP2_ON;
                 if (info->ChipFamily >= CHIP_FAMILY_R200) {
                     save->fp2_gen_cntl |= RADEON_FP2_DV0_EN;
                 }
@@ -6251,7 +6256,7 @@
                  * have a valid VGA screen even after X quits or VT is switched
                  * to the console mode.
                  */
-                 info->SavedReg.fp2_gen_cntl = RADEON_FP2_ON;
+                 info->SavedReg.fp2_gen_cntl |= RADEON_FP2_ON;
    }

    RADEONTRACE(("Pitch = %d bytes (virtualX = %d, displayWidth = %d)\n",
@@ -6466,11 +6471,9 @@
                                                                     * Manual P/N RRG-G04100-C Rev. 0.04), page
                                                                     * 3-17 (PLL_DIV_[3:0]).
                                                                     */
-                 {  1, 0 },              /* VCLK_SRC                 */
                 {  2, 1 },              /* VCLK_SRC/2               */
                 {  4, 2 },              /* VCLK_SRC/4               */
                 {  8, 3 },              /* VCLK_SRC/8               */
-                 {  3, 4 },              /* VCLK_SRC/3               */
                 { 16, 5 },              /* VCLK_SRC/16              */
                 {  6, 6 },              /* VCLK_SRC/6               */
                 { 12, 7 },              /* VCLK_SRC/12              */
@@ -6524,11 +6527,9 @@
                                                                     * Manual P/N RRG-G04100-C Rev. 0.04), page
                                                                     * 3-17 (PLL_DIV_[3:0]).
                                                                     */
-                 {  1, 0 },              /* VCLK_SRC                 */
                 {  2, 1 },              /* VCLK_SRC/2               */
                 {  4, 2 },              /* VCLK_SRC/4               */
                 {  8, 3 },              /* VCLK_SRC/8               */
-                 {  3, 4 },              /* VCLK_SRC/3               */
                 {  6, 6 },              /* VCLK_SRC/6               */
                 { 12, 7 },              /* VCLK_SRC/12              */
                 {  0, 0 }

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